t_CKHv2rev 52011-02-15
clock hold time
0112/2///61360_4#AAJ103
minimum time interval during which the clock signal must be retained at an input terminal after the subsequent active transition of the corresponding timing signal of a memory device at specified supply voltage and in a temperature range between specified temperatures (T_1} and T_2})
- Used by classes
- 1
Also appears in1#
Entities with the same name in other dictionaries:
- Code
AAJ103- Data type
- LEVEL(MIN) OF REAL_MEASURE_TYPE
- Unit
- UAA972 UAA972
Version history4#
IEC CDD records every published revision of each entity — version number, status, timestamp, and the change request that introduced it. OpenCDD captures the full chain of custody from cdd.iec.ch; the entry marked Current is the one rendered on this page.
All properties24#
- Version
- 2
- Revision
- 5
- Preferred name
- clock hold time
- Short name
- t_CKH
- Definition
- minimum time interval during which the clock signal must be retained at an input terminal after the subsequent active transition of the corresponding timing signal of a memory device at specified supply voltage and in a temperature range between specified temperatures (T_1} and T_2})
- Remark
- For further information, refer to AAF213
- Definition class
- 0112/2///61360_4#AAA001component
- Unit structure
- s
- Drawing reference
- NR3 S..3.3ES2
- Value format
- {0112/2///61360_4#AAE102,0112/2///61360_4#AAE958,0112/2///61360_4#AAE959}
- Initial value
- 0112/2///62720#UAA972 UAA972
- Responsible committee
- SC3D
- Publisher
- SC3D
- Published in
- IEC 61360-4
- Published in
- DEPENDENT_P_DET
- Status level
- Standard
- Version release date
- 2015-08-17
- Revision release date
- 2011-02-15
- Version initiation date
- 2015-08-17
- Original definition date
- 2003-02-21
- MDC_P001_6
- 0112/2///61360_4#AAJ103clock hold time
- MDC_P022
- LEVEL(MIN) OF REAL_MEASURE_TYPE
- MDC_P025_1
- t_CKH}
- MDC_P040
- T07