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t_Tv2rev 52011-02-15

transition time

0112/2///61360_4#AAJ105

limits to the value as specified by level (minmax) of the HIGH-to-LOW or LOW-to-HIGH level transition time which must be observed at the clock input of a memory device at specified supply voltage and in a temperature range between specified temperatures (T_1} and T_2})

Used by classes
1
property
Code
AAJ105
Data type
LEVEL(MIN,MAX) OF REAL_MEASURE_TYPE
Unit
UAA972 UAA972
Used by classes (1)

Version history4#

  1. Current rev 05
    17 Aug 2015 · 15:40 UTC by BATCH 00000917
    View on cdd.iec.ch ↗
  2. superseded rev 04
    23 Jul 2015 · 11:08 UTC by BATCH 00000907
    ↓ Version JSON
    View on cdd.iec.ch ↗
  3. superseded rev 03
    22 Jul 2015 · 14:21 UTC by BATCH 00000904
    ↓ Version JSON
    View on cdd.iec.ch ↗
  4. superseded rev 02
    27 Apr 2011 · 14:08 UTC by BATCH 00000704
    ↓ Version JSON
    View on cdd.iec.ch ↗

IEC CDD records every published revision of each entity — version number, status, timestamp, and the change request that introduced it. OpenCDD captures the full chain of custody from cdd.iec.ch; the entry marked Current is the one rendered on this page.

Metadata#

Note
The LOW voltage level is specified as VIL and the HIGH level as VIH
Version
2
Revision
5
Status
Standard
Publisher
SC3D
Published in
IEC 61360-4
Responsible committee
SC3D
Dates
  • Original: 2003-02-21
  • Current version: 2011-02-15
  • Current revision: 2015-08-17