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f_clk(max)v1rev 42015-03-13

maximum clock frequency

0112/2///61360_4#AFD117

minimum value of the maximum clock frequency that may be applied to an analog/digital or digital signal function integrated circuit at which the device operates normally, at specified conditions

Used by classes
1
property
Code
AFD117
Data type
LEVEL(MIN) OF REAL_MEASURE_TYPE
Unit
UAA170 UAA170
Used by classes (1)

Version history4#

  1. Current rev 04
    17 Aug 2015 · 15:40 UTC by BATCH 00000917
    View on cdd.iec.ch ↗
  2. superseded rev 03
    23 Jul 2015 · 11:08 UTC by BATCH 00000907
    ↓ Version JSON
    View on cdd.iec.ch ↗
  3. superseded rev 02
    22 Jul 2015 · 14:21 UTC by BATCH 00000904
    ↓ Version JSON
    View on cdd.iec.ch ↗
  4. superseded rev 01
    19 Dec 2014 · 13:10 UTC by BATCH 00000881
    ↓ Version JSON
    View on cdd.iec.ch ↗

IEC CDD records every published revision of each entity — version number, status, timestamp, and the change request that introduced it. OpenCDD captures the full chain of custody from cdd.iec.ch; the entry marked Current is the one rendered on this page.

Metadata#

Version
1
Revision
4
Status
Standard
Dates
  • Original: 2014-06-11
  • Current version: 2015-03-13
  • Current revision: 2015-08-17